Dimitris Raviolos

numbers every computer engineer should know

  • L1 cache reference: 0.5ns: typical L1 cache size: 64k
  • branch mispredict: 5ns
  • L2 cache reference: 7ns: newer chips have L2 and L3 cache; sizes from 256k to 8M
  • mutex lock/unlock: 100ns
  • memory reference: 100ns
  • compress 1K bytes with Zippy: 10μs: gzip?
  • send 2K bytes over 1 Gbps network: 20μs
  • read 1 Mb sequentially from memory: 250μs
  • round trip within datacenter: 500μs
  • disk seek: 10ms 0.1ms for SSDs
  • read 1 Mb sequentially from network: 10ms
  • read 1 Mb sequentially from disk: 30ms: 6ms - 30ms for SSDs?
  • send packet CA to Netherlands to CA: 150ms

Credits to Jeaf Dean and hyperpolyglot